A metal oxide semiconductor field effect transistor (MOSFET) device has strong gate control capability and the ability to suppress short channel effects. MOSFET devices are thus considered to be most promising candidates for future development. CMOS technology has been widely used in silicon on insulator (SOI), silicon substrate for cylindrical gate nanowire MOSFET devices.
Currently, during the formation of the nanowire device, the material under the nanowire needs to be etched away. In conventional methods, this requires an isotropic etching process. But such an etching process makes it difficult to obtain good gate shape, such as flat gate morphology. It is especially difficult to maintain a good interface between the nanowire and the gate, which can impact the gate characteristics, and degrade device performance.